In digital design methodology, the initial specification of input–output relationships for a logic function is typically captured using what foundational tabular artifact?

Introduction / Context:Before gates are drawn or HDL is written, designers clarify behavior by enumerating how outputs depend on inputs. This enumeration becomes the seed for simplification, implementation, and verification.

Given Data / Assumptions:

• We are at the specification/derivation stage.
• Inputs are finite, allowing exhaustive listing.
• The goal is a deterministic combinational function mapping inputs to outputs.

Concept / Approach:A truth table lists all input combinations and the corresponding outputs. From it, Karnaugh maps or Boolean algebra can be used to minimize logic and derive gate-level or HDL implementations.

Step-by-Step Solution:

Verification / Alternative check:Cross-check with simulation: implementing the simplified logic must reproduce the truth table for all rows.

Why Other Options Are Wrong:

• Standard/Two-stage/Two-dimensional: imprecise or descriptive terms, not the accepted artifact name.
• None of the above: incorrect because 'Truth' (truth table) is correct.

Common Pitfalls:Skipping impossible input combinations; failing to specify don't-cares; mislabeling bit order leading to logic errors downstream.

Final Answer:Truth